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authoreinsteinsfool <piotrkakol@protonmail.com>2018-06-23 21:15:29 +0200
committereinsteinsfool <piotrkakol@protonmail.com>2018-06-23 21:15:29 +0200
commit7cdd147da5b06a692b0b825992de3bb07f142156 (patch)
treeb33d211242225cbc3bf686524230b024a1252b12 /src/crypto/slow-hash.c
parentMerge pull request #3784 (diff)
downloadmonero-7cdd147da5b06a692b0b825992de3bb07f142156.tar.xz
Changed URLs to HTTPS
Diffstat (limited to 'src/crypto/slow-hash.c')
-rw-r--r--src/crypto/slow-hash.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/crypto/slow-hash.c b/src/crypto/slow-hash.c
index 35e98f2f5..9d4fc0dfa 100644
--- a/src/crypto/slow-hash.c
+++ b/src/crypto/slow-hash.c
@@ -309,7 +309,7 @@ STATIC INLINE void aes_256_assist2(__m128i* t1, __m128i * t3)
* CPU AES support.
* For more information about these functions, see page 19 of Intel's AES instructions
* white paper:
- * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/aes-instructions-set-white-paper.pdf
+ * https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
*
* @param key the input 128 bit key
* @param expandedKey An output buffer to hold the generated key schedule
@@ -558,7 +558,7 @@ void slow_hash_free_state(void)
* AES support on x86 CPUs.
*
* A diagram of the inner loop of this function can be found at
- * http://www.cs.cmu.edu/~dga/crypto/xmr/cryptonight.png
+ * https://www.cs.cmu.edu/~dga/crypto/xmr/cryptonight.png
*
* @param data the data to hash
* @param length the length in bytes of the data