From 3259df66a7a05a5065dceae23905ac92e9d604ae Mon Sep 17 00:00:00 2001
From: Bertrand Jacquin <beber@meleeweb.net>
Date: Tue, 6 Jul 2010 00:32:28 +0200
Subject: flashrom live ebuild

---
 sys-fs/flashrom/files/Makefile.patch               | 40 ++++++++++++++++++++++
 .../flashrom-BJA-chipset_enable-open-return.diff   | 11 ++++++
 sys-fs/flashrom/flashrom-9999.ebuild               | 33 ++++++++++++++++++
 3 files changed, 84 insertions(+)
 create mode 100644 sys-fs/flashrom/files/Makefile.patch
 create mode 100644 sys-fs/flashrom/files/flashrom-BJA-chipset_enable-open-return.diff
 create mode 100644 sys-fs/flashrom/flashrom-9999.ebuild

(limited to 'sys-fs')

diff --git a/sys-fs/flashrom/files/Makefile.patch b/sys-fs/flashrom/files/Makefile.patch
new file mode 100644
index 00000000..8b99311e
--- /dev/null
+++ b/sys-fs/flashrom/files/Makefile.patch
@@ -0,0 +1,40 @@
+--- Makefile.old	2009-05-04 20:30:18.305448790 +0400
++++ Makefile	2009-05-04 20:33:19.091149978 +0400
+@@ -11,7 +11,7 @@
+ INSTALL = /usr/bin/install
+ PREFIX  = /usr/local
+ #CFLAGS  = -O2 -g -Wall -Werror
+-CFLAGS  = -Os -Wall -Werror
++CFLAGS  ?= -Os -Wall -Werror
+ LDFLAGS = 
+ 
+ OS_ARCH	= $(shell uname)
+@@ -27,7 +27,7 @@
+ LDFLAGS += -L/usr/local/lib
+ endif
+ 
+-LDFLAGS += -lpci -lz
++LIBS = -lpci -lz
+ 
+ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
+ 	sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
+@@ -44,8 +44,8 @@
+           | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/")"'
+ 
+ $(PROGRAM): $(OBJS)
+-	$(CC) -o $(PROGRAM) $(OBJS) $(LDFLAGS)
+-	$(STRIP) $(STRIP_ARGS) $(PROGRAM)
++	$(CC) -o $(PROGRAM) $(LDFLAGS) $(OBJS) $(LIBS)
++#	$(STRIP) $(STRIP_ARGS) $(PROGRAM)
+ 
+ flashrom.o: flashrom.c
+ 	$(CC) -c $(CFLAGS) $(SVNDEF) $(CPPFLAGS) $< -o $@
+@@ -65,7 +65,7 @@
+ 		   echo "struct pci_access *pacc;";	   \
+ 		   echo "int main(int argc, char **argv)"; \
+ 		   echo "{ pacc = pci_alloc(); return 0; }"; ) > .test.c )
+-	@$(CC) $(CFLAGS) .test.c -o .test $(LDFLAGS) >/dev/null 2>&1 &&	\
++	@$(CC) $(CFLAGS) $(LDFLAGS) .test.c -o .test $(LIBS) >/dev/null 2>&1 &&	\
+ 		echo "found." || ( echo "not found."; echo;		\
+ 		echo "Please install pciutils-devel and zlib-devel.";	\
+ 		echo "See README for more information."; echo;		\
diff --git a/sys-fs/flashrom/files/flashrom-BJA-chipset_enable-open-return.diff b/sys-fs/flashrom/files/flashrom-BJA-chipset_enable-open-return.diff
new file mode 100644
index 00000000..660267fb
--- /dev/null
+++ b/sys-fs/flashrom/files/flashrom-BJA-chipset_enable-open-return.diff
@@ -0,0 +1,11 @@
+--- chipset_enable.c.ori	2009-05-05 22:00:42.000000000 +0200
++++ chipset_enable.c	2009-05-05 22:00:57.000000000 +0200
+@@ -511,7 +511,7 @@
+ 	unsigned char buf[8];
+ 
+ 	fd_msr = open("/dev/cpu/0/msr", O_RDWR);
+-	if (!fd_msr) {
++	if (fd_msr == -1) {
+ 		perror("open msr");
+ 		return -1;
+ 	}
diff --git a/sys-fs/flashrom/flashrom-9999.ebuild b/sys-fs/flashrom/flashrom-9999.ebuild
new file mode 100644
index 00000000..7f51f89f
--- /dev/null
+++ b/sys-fs/flashrom/flashrom-9999.ebuild
@@ -0,0 +1,33 @@
+# Copyright 1999-2009 Gentoo Foundation
+# Distributed under the terms of the GNU General Public License v2
+# $Header: $
+
+EAPI=2
+
+inherit eutils flag-o-matic subversion
+
+DESCRIPTION="Utility to detect, read, erase or write BIOS chips (DIP, PLCC, SPI)"
+HOMEPAGE="http://www.coreboot.org/Flashrom"
+ESVN_REPO_URI="svn://coreboot.org/${PN}/trunk"
+
+LICENSE="GPL-2"
+SLOT="0"
+KEYWORDS="~amd64 ~x86"
+IUSE=""
+
+RDEPEND="sys-libs/zlib
+	sys-apps/pciutils"
+DEPEND="${RDEPEND}"
+
+src_prepare() {
+	epatch "${FILESDIR}/Makefile.patch"
+	epatch "${FILESDIR}/${PN}-BJA-chipset_enable-open-return.diff"
+	append-flags "-D'FLASHROM_VERSION=\"${ESVN_WC_REVISION}\"'"
+}
+
+src_install() {
+	dosbin ${PN} || die "dosbin failed"
+	doman ${PN}.8 || die "doman failed"
+	dodoc README || die "dodoc failed"
+}
+
-- 
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